About
Lead Hardware Engineer — FPGA architectures, embedded systems, and multilayer PCBs.
I am a hands‑on digital hardware engineer with a background in both academic research and industrial product development. I trained at the National Technical University of Athens (Dipl.-Ing.), completed an M.Sc. in Biomedical Engineering and a D.I.C. at Imperial College London, and pursued a PhD on ultra low‑power bioelectronics and analogue VLSI.
During my PhD with the Bio‑Inspired VLSI Circuits and Systems Group at Imperial College London, my research primarily focused on the development of ultra low-power integrated BioElectronics for the continuous-time, continuous-value computation of highly non-linear cellular and molecular dynamics.
After my PhD I contributed to applied research and engineering projects, including:
Wellcome Trust / Department of Health Healthcare Innovation Challenge (2012–2014) — PCB design and layout, programming and testing of electronic devices for real‑time patient monitoring.
EPSRC project: electronic‑based ELISA with microfluidics (University of Southampton, 2014–2017) — PCB design and layout, microcontroller and FPGA programming and real-time monitoring.
EPSRC project: Tomographic imaging of flow and chromophore concentrations in biological tissue (University College London, 2017–2020) — hardware and firmware for time‑resolved DOT and DCS instrumentation; high‑speed data acquisition, embedded control, and prototype system integration for volumetric blood‑flow and chromophore imaging.
In 2020 I moved into industry, focusing on robust hardware and firmware for demanding, real‑world applications in biomedical devices, automotive systems, satellite communications and defence systems.
I design production‑grade embedded systems and FPGA architectures, develop multilayer PCBs, and deliver firmware and verification flows that survive field deployment and regulatory scrutiny.
Research interests and technical focus
Analogue VLSI circuits; ultra‑low power bioelectronics; analogue IC design; FPGA architectures and verification; embedded firmware; multilayer PCB design; signal processing; reproducible prototyping and engineering for fielded systems.
Experience (selected timeline)
- Senior Digital Hardware Engineer, Intellian Technologies — Nov 2021 – Apr 2025
- Senior Electronic Systems Engineer, Envisics — Jan 2020 – Oct 2021
- Research Associate, University College London (UCL) — Mar 2017 – Dec 2019
- Research Fellow, University of Southampton — Aug 2014 – Feb 2017
- Research Associate, Imperial College London (ICL) — Oct 2012 – Jul 2014
(Concise timeline above; full CV available on request.)
Current work
Leonardo UK Ltd — Lead Hardware Engineer (May 2025 – present)
Off‑duty obsessions
When I’m not debugging hardware or writing firmware, I’m a massive Lord of the Rings fan — yes, massive — and I’ll happily argue about the best scene in Middle‑Earth over a cup of coffee.
I also have an almost unhealthy devotion to Star Wars: I adore Anakin’s tragic arc and can recite his best moments with embarrassing enthusiasm. I like to think the Force has a soft spot for elegant circuitry — a well‑routed board is practically Jedi‑approved!
I rewatch the epic Matrix trilogy with ritualistic regularity.
- London, U.K.
- Website
- Google Scholar
- ResearchGate
- GitHub